====== Architektura i działanie procesora. Architektura współczesnych komputerów =====

  * [[wp>Moore's_law]], [[wp>Transistor_count]], [[https://www.top500.org/statistics/perfdevel/|Performance development]]
  * [[https://en.algorithmica.org/hpc/complexity/hardware/|Modern Hardware]]
  * Procesory
    * [[https://draftsbook.com/part-9-pipeline-hazards-solution-in-computer-architecture/|Pipeline Hazards & Solution in computer architecture]]: potoki, pobieranie z wyprzedzeniem, bufor pętli, przewidywanie rozgałęzień, ...
    * zredukowany zestaw instrukcji [[wppl>RISC]], złożony zestaw instrukcji [[wppl>CISC]]
    * [[wp>Instruction_pipelining]], [[wppl>Wykonywanie_spekulatywne]], [[https://cs.stanford.edu/people/eroberts/courses/soco/projects/2000-01/risc/pipelining/index.html|How pipelining works]]
    * {{https://www.ece.uvic.ca/~amiralib/courses/p6.pdf|Architektura P6}}
    * [[wp>Superscalar_processor]], [[wppl>Wykonywanie_poza_kolejnością]]
    * [[wppl>Hyper-threading]], 
    * [[wp>Single_instruction,_multiple_data|SIMD]]: [[wp>MMX_(instruction_set)|MMX]], [[wp>Streaming_SIMD_Extensions|SSE]], [[wppl>3DNow!]] 
      * [[wp>Flynn's_taxonomy]]: SISD, SIMD, SMSI, SMSD
    * [[wp>General-purpose_computing_on_graphics_processing_units]]
    * [[wp>Cell_(processor)]]
    * [[wp>Microarchitecture]], [[wp>Harvard_architecture]]
    * [[wp>X86_virtualization]]
  * Pamięć
    *  [[https://www.intel.com/content/www/us/en/developer/articles/technical/memory-performance-in-a-nutshell.html|Memory Performance in a Nutshell]]
    * {{https://people.freebsd.org/~lstewart/articles/cpumemory.pdf|What Every Programmer Should Know About Memory}}
    * Dostęp: [[wp>Sequential_access]], [[wp>Direct-access_storage_device]], [[wp>Random-access_memory]], [[wp>Content-addressable_memory]] \\ {{zajecia:so:random_vs_sequential_access.svg.png?100|}} {{zajecia:so:content-addressable-memory.png?100|}}
    * [[wppl>Kategoria:Pamięci_RAM]], [[wppl>Pamięć_statyczna|SRAM]], [[wppl>Pamięć_dynamiczna_(informatyka)]], [[wp>MCDRAM]], [[wppl>Nieulotna_pamięć_o_dostępie_swobodnym|NVRAM]], [[wp>NVDIMM]], [[https://www.signalintegrityjournal.com/blogs/8-for-good-measure/post/473-ddr-memory-interface-basics|DDR Memory Interface Basics]] \\ {{https://techlog360.com/wp-content/uploads/2020/10/DDR1-vs-DDR2-vs-DDR3-vs-DDR4-RAM-2.jpg?100|}} {{zajecia:so:dual_channel_slots.jpg?100|}}
    * [[wp>Interleaved_memory]] \\ {{zajecia:so:interleaving.gif?100|}} 
    * [[wppl>HyperTransport]], [[wp>Front-side_bus]], [[wp>Intel_QuickPath_Interconnect]], [[wp>Intel_Ultra_Path_Interconnect]], [[wp>Direct_Media_Interface]]
    * [[wppl>Wieloprocesorowość_symetryczna|SMP]], [[wppl>Niejednolity_dostęp_do_pamięci]], [[http://ixbtlabs.com/articles2/cpu/rmma-numa.html|NUMA]], [[wppl>AMD_Opteron]], [[wp>Multiprocessor_system_architecture]] \\ {{zajecia:so:smp.png?100|}} {{zajecia:so:cc-numa.png?100|}} {{zajecia:so:amd_opteron_arch.jpg?100|AMD Opteron z HyperTransport i osobnym kontrolerem pamięci}}
    * [[https://techlog360.com/ddr1-ddr2-ddr3-ddr4-ram-differences/|DDR1, DDR2, DDR3, and DDR4 RAM memory]]
  * Magistrale
    * [[wp>Industry_Standard_Architecture|ISA]], [[wp>Extended_Industry_Standard_Architecture|EISA]], [[wp>Peripheral_Component_Interconnect|PCI]], [[wppl>PCI_Express|PCI Express]], {{https://www.mouser.com/pdfdocs/pciexpressethernetnetworking.pdf|PCI Express white paper}}, [[https://www.top500.org/news/tech-companies-sign-on-to-new-standard-for-high-performance-server-bus/|OpenCAPI]] \\ {{https://upload.wikimedia.org/wikipedia/commons/3/36/Isa1.jpg?100|ISA}} {{https://upload.wikimedia.org/wikipedia/commons/6/6c/EISA_Bus.jpg?100|EISA}} {{https://upload.wikimedia.org/wikipedia/commons/thumb/0/0c/PCI_und_PCIe_Slots.jpg/1024px-PCI_und_PCIe_Slots.jpg?100|PCI i PCIe}}
    * [[wppl>USB]], [[wppl>ATA_(technologia)|IDE/ATA]], [[wppl>SATA]], [[wppl>SSD]], [[wppl>NVM_Express]], [[wppl>SCSI]], [[https://flylib.com/books/en/3.171.1.124/1/|SCSI Interface]], [[wppl>Serial_Attached_SCSI|SAS]] \\ {{https://upload.wikimedia.org/wikipedia/commons/thumb/6/6b/USB2-PCI_Card.jpg/1600px-USB2-PCI_Card.jpg?100|Kontroler USB na PCI}} {{https://upload.wikimedia.org/wikipedia/commons/thumb/c/c4/Ata_20070127_002.jpg/1600px-Ata_20070127_002.jpg?100|Złącze ATA}} {{https://upload.wikimedia.org/wikipedia/commons/thumb/6/6f/Super_Talent_2.5in_SATA_SSD_SAM64GM25S.jpg/1024px-Super_Talent_2.5in_SATA_SSD_SAM64GM25S.jpg?100|Dysk SSD ze złączem SATA}} {{https://upload.wikimedia.org/wikipedia/commons/thumb/7/7a/2017_Dysk_SSD_Plextor_M8Pe%28Y%29_256GB.jpg/1280px-2017_Dysk_SSD_Plextor_M8Pe%28Y%29_256GB.jpg?100|Dysk SSD zgodny z NVMe}} {{https://upload.wikimedia.org/wikipedia/commons/1/17/Kontroler_scsi_isa.jpg?100|Kontroler SCSI na magisrtali ISA}} {{http://www.pctechguide.com/wp-content/uploads/2011/09/chain.gif?100|daisy-chain (wianuszek) urządzeń SCSI}}
    * [[wppl>Chipset]], [[https://manybutfinite.com/post/motherboard-chipsets-memory-map/|Motherboard Chipsets and the Memory Map]], [[wppl>Mostek_północny]], [[wppl>Mostek_południowy]] \\ {{https://upload.wikimedia.org/wikipedia/commons/thumb/5/5f/IBM_ThinkPad_T42_Motherboard.jpg/1600px-IBM_ThinkPad_T42_Motherboard.jpg?100|Płyt główna IBM Lenovo T42}}
    * [[wp>List_of_interface_bit_rates]]